1. Field of the Invention
The present invention relates to a charge transfer device and a method for producing the same, and more particularly to a charge transfer device including an FDA (Floating Diffusion Amplifier) type charge detecting section and a method for producing the same.
2. Description of the Related Art
FIG. 6 shows in part a conventional charge transfer device 101. As is shown in FIG. 6, the charge transfer device 101 includes a transfer channel 102 for transferring a charge, a charge detecting section 103 for detecting a charge, and a source follower amplifier 104. FIG. 7 is a circuit diagram showing the source follower amplifier 104. As is shown in FIG. 7, the source follower amplifier 104 includes transistors Q.sub.1, Q.sub.2, Q.sub.3, and Q.sub.4.The transistors Q.sub.2 and Q.sub.3 are not shown in FIG. 6 for conciseness and clarity.
A charge is transferred in the transfer channel 102 when a two-phase clock pulse of .PHI.1 and .PHI.2 is applied to transfer electrodes 105. The charge in the transfer channel 102 is transferred to the charge detecting section 103 in accordance with a timing of an output gate pulse .PHI.OG applied to an electrode 106, and is stored in the charge detecting section 103. The signal charge is converted into an output signal in the form of a voltage at the source follower amplifier 104 (charge/voltage conversion). More specifically, a voltage which is in proportion to the amount of the charge stored in the charge detecting section 103 is detected by the transistor Q.sub.1 in the source follower amplifier 104, and is amplified in the source follower amplifier 104 so as to be detected as an output signal. When the output signal is detected, the charge in a charge detecting section 103 is drained to a reset drain RD in accordance with a timing of a reset gate pulse .PHI.RG.
Hereinafter, the charge detecting section 103 and the transistor Q.sub.1 will be described in more detail, with reference to FIG. 8. FIG. 8 is a view showing an 8--8 cross section of the charge transfer device 101 shown in FIG. 6. As is shown in FIG. 8, a P.sup.- -type first diffusion layer 111 is formed in a semiconductor substrate 110. The charge detecting section 103 is composed of an N.sup.+ -type floating diffusion layer 112 formed in the first diffusion layer 111. Second diffusion layers 113 to 115 are also formed in the first diffusion layer 111.
The transistor Q.sub.1 includes a portion 116 of the first diffusion layer 111 as a channel thereof, the portion 116 being interposed between the second diffusion layers 114 and 115. The transistor Q.sub.1 further includes a gate insulating film 117 formed on the portion 116 and a gate electrode 118 formed on the gate insulating film 117. The floating diffusion layer 112 is electrically connected to the gate electrode 118 through a wire 119. As is shown in FIG. 6, a source 120 and a drain 121 are formed so as to interpose the gate electrode 118 therebetween.
A charge q transferred in the charge transfer device 101 is converted into a voltage V in accordance with equations (1) and (2) shown below: EQU C.sub.FD =C.sub.d +C.sub.g +C.sub.1 ( 1) EQU V=q/C.sub.FD ( 2)
wherein C.sub.d represents the junction capacitance of the floating diffusion layer 112; C.sub.g represents the gate capacitance of the transistor Q.sub.1 ; and C.sub.1 represents parasitic capacitance that is mainly derived from a wire between the floating diffusion layer 112 and the transistor Q.sub.1. A sum total of the capacitances C.sub.d, C.sub.g, and C.sub.1 equals the detection capacitance C.sub.FD that contributes to charge/voltage conversion.
Currently, in the case of a CCD (Charge Coupled Device) solid imaging device using a charge transfer device mentioned above, the detection capacitance C.sub.FD is approximately 10 to 15 fF, in which the capacitance components C.sub.d, C.sub.g, and C.sub.1 make substantially equal contributions to the overall detection capacitance C.sub.FD.
As is seen from the equation (2), the voltage V increases as the detection capacitance C.sub.FD decreases, given that the detected charge q is constant. In recent years, there has been a demand for increasing the number of the pixels of a video camera, etc. in which a CCD solid imaging device is used, as well as a demand for miniaturizing such a video camera, etc. There has been a corresponding demand for a smaller and higher-performance charge transfer device. In particular, improvement in the charge/voltage conversion efficiency of such CCD solid imaging devices has been desired.
One method to meet the above-mentioned demands is to lower the detection capacitance C.sub.FD. As is described above, the voltage V increases as the detection capacitance C.sub.FD decreases, given that the detected charge q is constant. Accordingly, as is seen from the equation (2), the detection capacitance C.sub.FD can be reduced by lowering capacitance components C.sub.d, C.sub.g, and/or C.sub.1.
While it is possible to reduce the capacitance component C.sub.d by reducing the size of the floating diffusion layer 112, a channel width in the range of about 5 to 10 .mu.m must be secured so that a charge is securely transferred from the transfer channel 102. Therefore, it is undesirable to make the floating diffusion layer 112 as small as the current fine-processing technique allows it to be.
As will be appreciated, reduction of the gate capacitance C.sub.g and the parasitic capacitance C.sub.1 is critical to the improvement of the charge/voltage conversion efficiency.